1:4 Clock Driver for Intel PCI Express Chipsets
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PI6C20400 is a high-speed, low-noise differential clock buffer designed to be companion to PI6C410B. The device distributes the differential SRC clock from PI6C410B to four differential pairs of clock outputs either with or without PLL. The clock outputs are controlled by input selection of SRC_STOP#, PWRDWN# and SMBus, SCLK and SDA. When input of either SRC_STOP# or PWRDWN# is low, the output clocks are Tristated. When PWRDWN# is low, the SDA and SCLK inputs must be Tri-stated.
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
|---|---|
| Function | PCIe clock buffer |
| Number of Outputs | 4 |
| Output Type(s) | HCSL |
| Maximum Output Frequency (MHz) | 100 |
| Additive Jitter (ps) | 50 |
| Supply Voltage (V) | 3.3 |
| Input Type(s) | HCSL |
| Skew (PS) | 50 |
| Ambient or Junction Temperature (°C) | 0 to 70 |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2481 | 2020-08-26 | 2021-02-26 | Device End of Life (EOL) |
| PCN-2325 – Rev 3 (Interim Update) | 2018-04-20 | 2020-11-20 | Fab Porting from Global Foundries to MagnaChip |
