Yes, all Pericom's packet switches provide EEPROM/SMBus to change PHY parameters including Low Driver Current, High Drive Current, Driver Transmit Current, De-emphasis Transmit Equalization, Receive Termination Adjustment, Transmit Termination Adjustment and Receiver Equalization Level Control.
Only GreenPacket Family packet switches, PI7C9X20505GP, PI7C9X20508GP, provide strapping pin option to change PHY parameters to improve signal quality. The following strapping pins are available: HIDRV, LODRV, DTX[3:0], DEQ[3:0], RXEQCTL[1:0], RXTERMADJ[1:0] and TXTERMADJ[1:0].
Yes, Pericom Packet Switches support operation in asynchronous mode, in which the reference clock source of Pericom packet switch is different from that of the root complex. However, the deviation in the clock signals must be within +/- 300ppm.
Yes, Pericom's Packet Switches require the standard PCI-to-PCI Bridge device driver in order to work, which is built in most of the OS's. That is, most of the OS's automatically install the standard PCI-to-PCI Bridge device driver when a Pericom's packet switch is plugged in the system for first time.
"YES, please refer to the following application notes.
AN219 – GreenPacket PCI Express Packet Switch – Industrial Temperature Support 1.0
AN220 – PI7C9X20303SL-404SL Industrial Temperature Support
AN221 – PI7C9X20303ULA Industrial Temperature Support"
Yes. Please refer to the Application Note, "AN227 – Product Compatibility List" for the complete list.
Yes, Design Kits for Packet Switches are available and include datasheet, product brief, reference schematics, software tools, demo board user manual, design guideline, IBIS file and related application notes. The design kits can be requested from your distributer or Pericom FAE.
Yes, power consumption information is included in the design kit.
GreenPacket Family (PI7C9X20505GP, PI7C9X20508GP) provides full support for hot plug functions, including Power Indicator, Attention Indicator, Attention Button, Presence Detected Changes, Slot Power Enable Power Fault. SlimPacket Family (PI7C9X20303SL, PI7C9X20404SL) and UltraLo Family PI7C9X20303UL only support Presence Detected Changes event. EEPROM or the strapping pins are used to enable the hot plug feature.
No, Pericom packet switch does not support SSC sources.
Pericom's packet switches can be configured by the configuration registers. There are three methods for this purpose: configuration read/write, SMBus, and EEPROM. Configuration read/write and SMBus can access configuration registers on-line. However, SMBus can only access these registers below 100H offset. Configuration read/write method is required if you intend to access registers above 100H offset. EEPROM can change the default values of certain configuration registers. EEPROM content is auto-loaded to packet switch when power-on.
Please refer to the application note, "PCIe Packet Switch SMBus Programming Guild 0.1c" for detailed information. Please set SMBus address using GPIO[7:5]. Otherwise, SMBus may not work due to unknown SMBus address.
The pin is name "MRL_PDCx" in GreenPacket Family packet switches and "PRSNTx" in SlimPacket Family and UltraLo Family with the same function. MRL_PDCx/PRSNTx pin is used to indicate whether a device is present in the slot of downstream ports in express card interface implemention. When MRL_PDCx/PRSNTx is asserted high, it represents the device is present in the slot of downstream ports. Otherwise, it represents the absence of the device. If express card interface is not implemented, MRL_PDCx/PRSNTx should be connected to GND through a pull-down resistor.
The implementation of EEPROM depends on specific application. Normally, a packet switch is fully functional without EEPROM. However, in certain applications, EEPROM is needed to change certain default values of configuration registers. We recommend keeping the EEPROM footprint and circuitry just in case.
Not all obsolete parts will have a direct replacement. However, we recommended that you contact your regional sales office.
In order to meet the different application needs, the driving current and equalization of each transmitting channels can be adjusted individually using strapped pins (GreenPacket Family) and EEPROM (GreenPacket/SlimPacket/UltraLo Family). The driver current of each channel is set to 20mA in default mode without pins being strapped. To change the current value, the user can strap the pins/EEPROM either for nominal value (HIDRV, LODRV) or actual value (DTX [3:0]), which is a scaled multiple of Inom. The following tables illustrate the possible transmitted current values the chip provides.
It is most likely that the boot code of the embedded system does not initialize Pericom's packet switch. The packet switch needs to be initialized in order to work normally. The packet switch is initialized by BIOS on x 86 systems and by the boot code on embedded system.
The evaluation board of a Pericom's packet switch only provides the PCIe x1 slot on the downstream ports. Customers need an adapter they would like to plug in the express card or mini-pcie device. When the PRSNT# pin of the adapter is floating, the express card or mini-pcie card can not be detected.
There are several types of jitter, but the main ones are: cycle-to-cycle jitter, period jitter, half period jitter, and peak-to-peak jitter. Jitter terminology can be found in AB36: Jitter Measurement Techniques at Application Brief No. 36 or Application Note No. 27.
Surprise Hot Removal function allows unplugging of express card without prior notification. All Pericom's packet switches support this function. All downstream ports of SlimPacket Family and UltraLo Family packet switches support the surprise hot removal function. Only Port 1 and Port 2 of GreenPacket Family packet switches support this function. That is, only Port 1 and Port 2 of GreenPacket Family packet switches can implement the express card interface.
All Pericom's products that are not lead-free are composed of 85% Sn and 15% Pb. For lead-free products, they are composed of 100% matte Sn. Lead-free products are marked and ordered with the letter "E" suffix at the end of the part number.
The reference clock DC specifications and AC timing requirements are shown in the table below. More details can be found in "PCI Express Card Electromechanical Specification Revision 1.1", Chap 2.1.3.
FIT and MTBF data can be found at Pericom's Quality webpage.
Lead (Pb)-Free and Green information can be found on individual datasheets or Pb-Free & Green Page.
The reference clock input pins connect to external 100MHz differential clock. The signal must match to LVPECL or HCSL spec. A 100nF capacitor should be placed between the clock source and the packet switch. The purpose of this capacitor is to achieve AC coupling. This AC Coupling ensures the Packet Switch is compatible with the differential clock signals regardless the type of the clock. The input clock signals must be delivered to the clock buffer cell through an AC-coupled interface so that only the AC information of the clock is received, converted, and buffered. Please refer to the application note, "Express Interface AC-Coupling Application Note", in the design kit for more details.