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PI6CDBL401B

4-Output Low Power PCIE GEN1-2-3 Buffer

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Overview

Product Description

The PI6CDBL401B is a 4-output low power buffer for 100MHz PCIe Gen1, Gen2 and Gen3 applications with integrated output terminations providing Zo=100Ω. The device has 4 output en- ables for clock management, and 3 selectable SMBus addresses. 

Features

  • 4x 100MHz low power HCSL or LVDS compatible outputs
  • PCIe 3.0, 2.0 and 1.0 compliant
  • Programmable output amplitude and slew rate
  • Supply voltage of 3.3V +/-10%
  • Industrial ambient operation temperature
  • Available in lead-free package: 32-TQFN 

Applications

  • PCIe 3.0/2.0/1.0 clock distribution 

Specifications & Technical Documents

Product Parameters

Compliance (Only Automotive Supports PPAP)

Standard

Function

PCIe clock buffer

Number of Outputs

4

Output Type(s)

HCSL

Maximum Output Frequency (MHz)

100

Additive Jitter (ps)

50

Supply Voltage (V)

3.3

Input Type(s)

HCSL

Skew (PS)

50

Ambient or Junction Temperature (°C)

-40 to 85

Purchase & Availability

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