HiFlex? Serial Interface Clock
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The PI6LC48S04 is a 4-output clock synthesizer designed for serial reference clock applications. The device generates four copies of a selectable 250MHz, 156.25MHz, 125MHz or 100MHz
clock signal with 0.34ps phase jitter performance. The four outputs are organized in two banks of two LVDS and two low power HCSL ouputs.The device supports 3.3V and 2.5V voltage
supplies and is packaged in a small 32-lead TQFN package.
Compliance (Only Automotive(Q) supports PPAP) | Standard |
---|---|
Supply Voltage (V) | 2.5, 3.3 |
Jitter RMS (ps) | 0.32 |
Skew (PS) | 55 |
Output Frequency (MHz) | 156.25/ 125/ 100/ 250 |
Input Type(s) | Crystal, CMOS |
Output Type(s) | LVDS, Low Power HCSL |
Number of Outputs | 4 |
Ambient or Junction Temperature (°C) | -40 to 85 |
Supported Frequencies (MHz) | 156.25, 125, 100, 250 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
PCN # | Issue Date | Implementation Date | Subject |
---|---|---|---|
PCN-2520 | 2021-05-27 | 2021-08-27 | Qualified Additional Bump Site and Assembly/Test (A/T) Sites |
PCN-2328 | 2018-04-12 | 2018-10-12 | Device End of Life for tray packaging only |
PI6LCxxxx is Pericom's newly developed high frequency, very low jitter clock generator family, which use high Q silicon VCO to dramatically reduce traditional PLL clock jitter. They are especially good for Telecom, Datacom, and Ethernet for phase jitter <=1 ps designs. HiFlex Clock FInder tool
LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet to prevent double termination.