Log in or register
to manage email notifications about changes to datasheets or PCNs for this part.
The PI6CG33601C is a 6-output very low power PCIe Gen1/Gen2/ Gen3/Gen4/Gen5 clock generator. It uses 25MHz crystal or CMOS reference as an input to generate the 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 24 external resistors and make layout easier. An additional buffered reference output is provided to serve as a low noise reference for other circuitry.
It uses Diodes' proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. It also provides various options such as different slew rate and amplitude through SMBUS so that users can configure the device easily to get the optimized performance for their individual boards. The device also supports selectable spread-spectrum options to reduce EMI for various applications.
3.3V Supply Voltage
Crystal/CMOS input: 25 MHz
6 Differential low power HCSL outputs with on-chip termination
Default ZOUT = 100Ω
Individual output enable
Reference CMOS output
Programmable slew rate and output amplitude for each output
Differential outputs blocked until PLL is locked
Selectable 0%, -0.25% or -0.5% spread on differential outputs