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PI6CEQ20200

PCIe Gen 2/Gen3 Buffer

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Overview

Product Description

The PI6CEQ20200 is a high performance PCIe Gen2/ Gen3 zero delay buffer with two HCSL outputs. Diodes' proprietary equalization technique used in this device improves signal integrity and makes this device suitable for PCIe Gen2/ Gen3 applications even when the input from the main clock has to travel a long distance.

Features

  • PCIe Gen2/ Gen3* compliant clock buffer/ZDB
    * Gen3 performance only available in Commercial temp
  • Internal equalization for better signal integrity
  • 2 HCSL outputs
  • Dual PLL bandwidth for SSC tracking
  • Cycle-to-Cycle Jitter : 40ps (typ)
  • Output-to-Output Skew <10ps
  • 3.3V supply voltage
  • TSSOP-20 packages

Applications

  • Servers
  • Embedded computing systems
  • Networking systems

Specifications & Technical Documents

Product Parameters

Compliance (Only Automotive Supports PPAP)

Standard

Function

PCIe clock buffer

Number of Outputs

2

Output Type(s)

HCSL

Maximum Output Frequency (MHz)

100

Additive Jitter (ps)

0.6

Supply Voltage (V)

3.3

Input Type(s)

HCSL

Skew (PS)

10

Ambient or Junction Temperature (°C)

-40 to 85

Purchase & Availability

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Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2770 2025-10-30 2025-10-30 Add Fab Site Code, Country of Diffusion (COD) and Assembly Site Origin (ASO) on Product and Shipping Labels for all Diodes Products