Description

The PI6CB33402 is a 4-output very low power PCIe Gen1/Gen2/ Gen3/Gen4/Gen5 clock buffer. It takes a reference input to fanout four 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier. Individual OE pin for each output provides easier power management.

It uses Diodes proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz, 125MHz and 133.33MHz via SMBus. It provides various options such as different slew rate and amplitude through SMBUS so that users can configure the device easily to get the optimized performance for their individual boards.

Feature(s)

• 3.3V supply voltage
• HCSL input: 100MHz, also support 50MHz, 125MHz or 133.33MHz via SMBus
• 4 differential low power HCSL outputs with on-chip termination
• Default ZOUT = 85Ω
• Spread spectrum tolerant
• Individual output enable
• Programmable Slew rate and output amplitude for each output
• Differential outputs blocked until PLL is locked
• Strapping pins or SMBus for configuration
• Differential output-to-output skew <50ps
• Very low jitter outputs 
  • Differential cycle-to-cycle jitter <50ps
  • PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant
  • PCIe Gen 2 and 3 SRiS and SRnS compliant
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
• Packaging (Pb-free & Green): 32-lead 5×5mm TQFN