3.3V, 4 Outputs, LVTTL/LVCMOS to LVPECL Clock Buffer with Selectable Inputs
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The PI6C48535-01B is a high-performance low-skew LVPECL fanout buffer. PI6C48535-01B features two selectable single-ended clock inputs and translates to four LVPECL outputs. The CLK0 and CLK1 inputs accept LVCMOS or LVTTL signals. The outputs are synchronized with input clock during asynchronous assertion/ deassertion of CLK_EN pin. PI6C48535-01B is ideal for singleended LVTTL/LVCMOS to LVPECL translations. Typical clock translation and distribution applications are data-communications and telecommunications.
Compliance (Only Automotive Supports PPAP) |
Standard |
|---|---|
Function |
Buffer |
Number of Outputs |
4 |
Output Type(s) |
LVPECL |
Maximum Output Frequency (MHz) |
500 |
Additive Jitter (ps) |
0.03 |
Supply Voltage (V) |
3.3 |
Input Type(s) |
TTL, CMOS, LVPECL |
Skew (ps) |
30 |
Ambient or Junction Temperature (°C) |
-40 to 85 |
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A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2770 | 2025-10-30 | 2025-10-30 | Add Fab Site Code, Country of Diffusion (COD) and Assembly Site Origin (ASO) on Product and Shipping Labels for all Diodes Products |
