Level Translating Fast-Mode Plus I2C Bus/SMBus Repeater
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The PI4ULS5V212 is a CMOS integrated circuit intended for Fast-mode Plus (Fm+) I2C-bus or SMBus applications. It can provide level shifting between low voltages (down to 0.6V) and higher voltages (2.2V to 5.5V) in mixed-mode applications. The PI4ULS5V212 enables the system designer to isolate two halves of a bus for both voltage and capacitance, accommodating more I2C devices or longer trace length. It also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 540 pF at 1 MHz, or up to 4000 pF at lower speeds. The SDA and SCL pins are overvoltage-tolerant and are high-impedance when the PI4ULS5V212 is unpowered. The 2.2V to 5.5V bus port B drivers have the static level offset, while the adjustable voltage bus port A drivers eliminate the static offset voltage. This results in a LOW on the port B translating into a nearly 0V LOW on the port A, which accommodates the smaller voltage swings of lower voltage logic. The EN pin is referenced to VCC(B) and can also be used to turn the drivers on and off under system control.
Compliance (Only Automotive supports PPAP) | Standard |
---|---|
Translation From (V) | 0.6 to 5.5 |
Translation To (V) | 2.2 to 5.5 |
Max Signal Rate | 1MHz |
Bits Needed | 2 |
Auto Direction Sensing? | No |
Shift | Bi-Directional |
Ambient or Junction Temperature (°C) | -40 to 85 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents