Log in or register
to manage email notifications about changes to datasheets or PCNs for this part.
The 74LVCH2T45 is a dual-bit, dual-supply transceiver with tri-state outputs suitable for transmitting two logic bits across different voltage domains. The direction pin (DIR) and Port A, consisting of pins 1A and 2A, have logic levels in relation to VCC(A) while port B, consisting of pins 1B and 2B have logic levels related to VCC(B). This arrangement allows for universal low-voltage translation between any voltages from 1.2V to 5.5V. When a HIGH logic level is applied to the direction pin, port A pins become inputs and port B pins are outputs. Conversely, the roles of the ports are reversed when the direction pin is asserted LOW.
The tri-state (Ioff) feature places all port pins in a high impedance state when either power supply is at 0V, which prevents and damages backflow currents and provides power-down electrical isolation up to 5.5V as not to interfere with any logic activity on either of the ports.
The 74LVCH2T45 is a variant of the 74LVC2T45 that includes a bus hold feature at each input. The bus hold feature maintains the previous logic level therefore a valid logic level is always present eliminating the need for additional resistors for unused or disconnected inputs.
Voltage Level Translation Well-Suited to Join Logic Types Operating at Different Voltages
Power-Down Signal Isolation If Either Voltage Domain is Turned Off the Signal is Isolated and There is No Loading on Signal Lines