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The 74LVC2G00 is a dual two input NAND gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
Wide Supply Voltage Range from 1.65 to 5.5V
±24mA Output Drive at 3.3V
CMOS low power consumption
IOFF Supports Partial-Power-Down Mode Operation
Inputs accept up to 5.5V
Schmitt Trigger Action at all inputs make the circuit tolerant for slower input rise and fall time. The hysteresis is typically 65 mV at VCC = 3.0V