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The PI7C8152A and PI7C8152B (PI7C8152x) are Diodes' PCI-to-PCI Bridge that are designed to be fully compliant with the 32-bit, 66MHz implementation of the PCI Local Bus Specification, Revision 2.2. The PI7C8152B supports both synchronous and asynchronous bus transactions between devices on the Primary Bus and the Secondary Buses operating up to 66MHz. The PI7C8152A supports synchronous transactions only. In synchronous mode, both buses must operate at the same frequency. The Primary and Secondary Bus can also operate in concurrent mode, resulting in added increase in system performance.
32-bit Primary and Secondary Ports run up to 66MHz
Compliant with the PCI Local Bus Specification, Revision 2.2
Compliant with PCI-to-PCI Bridge Architecture Specification, Revision 1.1.
Compliant with the Advanced Configuration Power Interface (ACPI) Specification.
Compliant with the PCI Power Management Specification, Revision 1.1.
All I/O and memory commands
Type 1 to Type 0 configuration conversion
Type 1 to Type 1 configuration forwarding
Type 1 configuration write to special cycle conversion
Synchronous and Asynchronous operation support
Supported modes of Asynchronous operation (PI7C8152B ONLY)
25MHz to 66MHz
25MHz to 66MHz
Supported modes of Synchronous operation
Provides internal arbitration for four secondary bus masters
Programmable 2-level priority arbiter
Disable control for use of external arbiter
Supports posted write buffers in all directions
Four 128 byte FIFOís for delay transactions
Two 128 byte FIFOís for posted memory transactions
Enhanced address decoding
32-bit I/O address range
32-bit memory-mapped I/O address range
64-bit prefetchable address range
ISA-aware mode for legacy support in the first 64KB of I/O address range