Diodes Incorporated
Back to General and HiFlex Clock Generators

PI6LC48L0201

Ethernet Clock Generator

NOTE: Datasheet may not yet reflect updated package obsolescence/phase out status or Package Drawing. Please refer to the BUY NOW tab for the most up to date package options and drawings. Please refer to PCN/PDN tabs for most current package obsolescence/phase out status.
Contact Sales

Log in or register to manage email notifications about changes to datasheets or PCNs for this part.

Description

The PI6LC48L0201 is a 2-output LVDS synthesizer optimized to generate Ethernet reference clock frequencies and is a member of Pericom’s HiFlex family of high performance clock solutions. Using a 25MHz crystal, the most popular Ethernet frequencies can be generated based on the settings of 2 frequency select pins.
The PI6LC48L0201 uses Pericom’s proprietary low phase noise PLL technology to achieve ultra low phase jitter, so it is ideal for Ethernet interface in all kind of systems.

Applications

  • Networking systems

Features

  • Two differential LVDS output pairs
  • Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended clock input
  • Supports the following output frequencies: 62.5MHz, 125MHz, 156.25MHz
  • RMS phase jitter @ 156.25MHz, using a 25MHz crystal (1.875MHz – 20MHz): 0.2ps (typical)
  • RMS phase jitter @ 156.25MHz, using a 25MHz crystal (12kHz – 20MHz): 0.32ps (typical)
  • Full 3.3V or 2.5V supply modes
  • Commercial and industrial ambient operating temperature
  • Available in lead-free package: 20-TSSOP

Product Specifications

Product Parameters

Compliance (Only Automotive(Q) supports PPAP) Standard
Supply Voltage (V) 2.5, 3.3
Additive Jitter (ps) 0.35
Skew (PS) 0
Maximum Output Frequency (MHz) 2x 62.5/ 125 / 156.25 MHz
Input Type(s) Crystal, CMOS
Output Type(s) LVDS
Number of Outputs 2
Ambient or Junction Temperature (°C) -40 to 85
Supported Frequencies (MHz) 62.5, 125, 156.25

Technical Documents

Recommended Soldering Techniques

TN1.pdf

Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents

Request Documents

FAQs

PI6LC48L0201 FAQs

What is LVPECL clock and its termination?

LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet  to prevent double termination.