Diodes Incorporated
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PI6LC48C21

Ethernet Clock Generator

NOTE: Datasheet may not yet reflect updated package obsolescence/phase out status or Package Drawing. Please refer to the BUY NOW tab for the most up to date package options and drawings. Please refer to PCN/PDN tabs for most current package obsolescence/phase out status.
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Product Description

The PI6LC48C21 is a single LVCMOS output synthesizer opti- mized to generate Ethernet reference clock frequencies and is a member of Diodes' HiFlex family of high performance clock solutions. Using a 25MHz crystal, It can generate 125MHz with very low phase jitter.

It is ideal for Ethernet interface in all kind of systems. 

Features

  • Single LVCMOS output
  • Supports125MHz or 130MHz output frequencies
  • RMS phase jitter @ 125MHz, using a 25MHz crystal (1.875MHz – 20MHz): 0.15ps (typical)
  • RMS phase jitter @ 125MHz, using a 25MHz crystal (12kHz – 20MHz): 0.33ps (typical)
  • Full 3.3V or 2.5V supply modes
  • Commercial and industrial ambient operating temperature
  • Available in lead-free package: 8-TSSOP 

Applications

  • Networking systems 

Product Specifications

Product Parameters

Compliance (Only Automotive(Q) supports PPAP) Standard
Supply Voltage (V) 2.5, 3.3
Additive Jitter (ps) 0.35
Skew (PS) 0
Maximum Output Frequency (MHz) 1x 125 MHz
Input Type(s) Crystal, CMOS
Output Type(s) LVCMOS
Number of Outputs 1
Ambient or Junction Temperature (°C) -40 to 85
Supported Frequencies (MHz) 125

Technical Documents

Recommended Soldering Techniques

TN1.pdf

Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents

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Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2651 2023-11-13 2023-11-13 Qualified Additional Fab Source, Assembly Test Sites, Die Revision, BOM, Datasheet, Tape and Reel Packing Quantity.

FAQs

Related Protocol FAQs

PI6LC48C21 FAQs

What is LVPECL clock and its termination?

LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet  to prevent double termination.