NRND = Not Recommended for New Design
LVCMOS VCXO Jitter Attenuator
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The PI6CX201A is composed of a phase-locked loop with integrated VCXO oscillator for use in the clock jitter attenuation applications. It is optimized for use with a crystal of 25MHz, and has typical output phase jitter less than 350fs (RMS).
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
|---|---|
| Supply Voltage (V) | 3.3 |
| Additive Jitter (ps) | 0.3 |
| Skew (PS) | 0 |
| Maximum Output Frequency (MHz) | 25 |
| Input Type(s) | LVTTL, LVCMOS |
| Output Type(s) | LVTTL, LVCMOS |
| Number of Outputs | 1 |
| Function | Jitter Cleaner |
| Ambient or Junction Temperature (°C) | -40 to 85 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2642 | 2023-09-05 | 2024-03-05 | Device End of Life (EOL) |
