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PI6CG18201

Very Low Power 1.8V, 2-Output PCIe 4.0 Clock Generator with on-chip termination

Evaluation Boards and User Guides

PI6CG18201-EVB-use-manual-1.pdf (233 KB)

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Description

The PI6CG18201 is a 2-output very low power PCIe Gen1/Gen2/Gen3/Gen4 clock generator. It uses 25MHz crystal or CMOS reference as an input to generate the 100MHz low power differential HCSL

outputs with on-chip terminations. The on-chip termination can save 8 external resistors and make layout easier. An additional buffered reference output is provided to serve as a low noise reference

for other circuitry.

It uses Diodes Incorporated proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. It also provides various options such as different slew rate and amplitude through

strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual boards. The device also supports selectable spread-spectrum options

to reduce EMI for various applications.

Feature(s)

1.8V supply voltage
Crystal/CMOS input: 25 MHz
2 differential low power HCSL outputs with on-chip termination
Individual output enable
Reference CMOS output
Programmable Slew rate and output amplitude for each output
Differential outputs blocked until PLL is locked
Selectable 0%, -0.25% or -0.5% spread on differential outputs
Strapping pins or SMBus for configuration;
3.3V tolerant SMBus interface support
Very low jitter outputs
Differential cycle-to-cycle jitter <50ps
Differential output-to-output skew <50ps
PCIe Gen1/Gen2/Gen3/Gen4 compliant
CMOS REFOUT phase jitter is < 1.5ps RMS
Packaging (Pb-free & Green): 24-lead 4×4mm TQFN

Specifications & Technical Documents

Product Parameters

Compliance (Only Automotive Supports PPAP)	Standard
Function	Generator
Input Type(s)	Crystal, CMOS
Additive Jitter (ps)	<0.5
Number of Outputs	2
Maximum Output Frequency (MHz)	100
Output Type(s)	Low Power HCSL
Skew (PS)	50
Supply Voltage (V)	1.8
Ambient or Junction Temperature (°C)	-40 to 85