PI6CBE33125

Description

The PI6CBE33125 is a low-power PCIe® 1.0/2.0/3.0/ 4.0/5.0/6.0 clock buffer. It takes a reference input to fanout twelve 100MHz low-power differential HCSL outputs with on-chip terminations for 85Ω output impedance. It supports both zero-delay and fanout buffer functions for various applications. An individual OE pin for each output provides easier power management. It uses Diodes proprietary PLL design to achieve very-low jitter that meets PCIe 1.0/2.0/3.0/4.0/5.0/6.0 requirements. Other than PCIe 100MHz support, this device also supports 133.33MHz via a pin.

Feature(s)

• Twelve Differential Low-Power HCSL Outputs with On-Chip Termination
• Default Z_OUT = 85Ω
• Spread Spectrum Tolerant
• Individual Output Enable
• Selectable PLL Bandwidths
• Hardware/SMBus Control of ZDB and Fanout Buffer Modes
• Up to 9 Selectable SMBus Addresses
• 1 to 400MHz Fanout Buffer Operation
• 100MHz and 133.33MHz ZDB Mode
• Differential Output-to-output Skew <50ps
• Very Low Jitter Outputs
  • Differential Cycle-to-cycle Jitter <50ps
  • Fanout Buffer Mode Additive Phase Jitter
    • PCIe 6.0 CC: 0.012 ps
    • DB2000Q Additive Jitter: 0.02ps
  • ZDB Mode Phase Jitter
    • PCIe 6.0 CC: RMS 0.01 ps
    • QPI/UPI 11.4GB/s: 0.14ps RMS
    • IF-UPI: RMS 0.15 ps
• 3V Core Supply Voltage
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
• For automotive applications requiring specific change control
• (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/
• Packaging (Pb-free & Green):
  • 64-lead, 9mm × 9mm TQFN (ZD)