Description

The PI6CB33201 is a two-output very-low-power PCIe Gen1/ Gen2/Gen3/Gen4/Gen5 clock buffer. It takes a reference input to
fanout two 100MHz low-power differential HCSL outputs with on-chip terminations. The on-chip termination can save eight
external resistors and make layout easier. Individual OE pin for each output provides easier power management.

It uses Diodes proprietary PLL design to achieve very-low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements.
Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz, 125MHz, and 133.33MHz via
SMBus. It provides various options such as different slew rate and amplitude through SMBUS, so users can configure the device easily to get the optimized performance for their individual boards.

Feature(s)

• 3.3V Supply Voltage
• HCSL Input of 100MHz; Also supports 50MHz, 125MHz, or 133.33MHz via SMBus
• Two Differential Low-Power HCSL Outputs with On-Chip Termination
• Default ZOUT = 100Ω
• Spread-Spectrum Tolerant
• Individual Output Enable
• Programmable Slew Rate and Output Amplitude for each output
• Differential Outputs Blocked until PLL is Locked
• Strapping Pins or SMBus for Configuration
• Differential output-to-output skew <50ps
• Very low jitter outputs

- Differential cycle-to-cycle jitter <50ps
- PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant
- PCIe Gen 2 and 3 SRiS and SRnS compliant

• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
• For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/
• Packaging (Pb-free & Green):
  − 24-lead 4mm × 4mm TQFN