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The PI4IOE5V6534Q is a 34-bit general-purpose I/O expander that provides remote I/O expansion for most microcontroller families via the FC-bus interface.
The device provides a simple solution when additional I/Os are needed while keeping interconnections to a minimum. for example, in battery-powered mobile applications for interfacing to sensors, push buttons, keypad, etc.
The expander IC can operate from 1.65 V to 5.5 V on the GPIO-port side and 0.8 V to 3.6 V on the SDA/SCL side. This allows the PI4IOE5V6534Q to interface with next generation microprocessors and microcontrollers on the SDA/SCL side, where supply levels are dropping down to conserve power.
The VDD(I2C-bus) in PI4IOESV6534Q provides bidirectional voltage-level translation, and the pin should be connected to the VDD of the external SCL/SDA lines. The voltage level on the GPIO port of the PI4IOE5V6534Q is determined by VDD(P)
At power-on, the I/Os are configured as inputs, however, the system master can enable the I/Os as either inputs or outputs by writing to the I/O direction bits. The data for each input or output is kept in the corresponding Input or Output register. All registers can be read by the system master.
PI4IOE5V6534Q has open-drain interrupt (INT) output pin that goes LOW when the input state of a GPIO-port changes from the input-state default register value. The device also has an interrupt masking feature, which the user can use to mask the interrupt from an individual GPIO-port.
Operating power supply voltage range of 8V to 3.6V on the I2C-bus side
Allows bidirectional voltage-level translation and GPIO expansion between:
8V to 3.6V SCL/SDA and 1.8/2.5/3.3/5.5V Port
Low standby current consumption:
2 μA typical at 3.3 V VDD(P)
5 V tolerant I/O ports and 3.6 V tolerant I2C-bus pins
1 MHz Fast-mode Plus I2C-bus interface
Compliant with the I2C-bus Fast-mode plus, Fast-mode and Standard mode
Output port configurations: bank selectable or pin selectable push-pull or open-drain output stages
Interrupt status: read-only register identifies the source of an interrupt
I/O programming features:
Output drive strength: four programmable drive strengths to reduce rise and fall times in low-capacitance applications
Input latch: Input Port register values changes are kept until the Input Port register is read
Pull-up/pull-down enable: floating input or pull-up/pull-down resistor enable