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PI2EQX4401D (Not Recommended for new design)

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Product Description

Pericom Semiconductor’s PI2EQX4401D is a low power, PCI-Express compliant signal re-driver. The device provides programmable equalization, amplifi cation, and de-emphasis by using 4 select bits, SEL[0:3], to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. PI2EQX4401D supports two 100Ω Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or extends the signals across other distant data pathways on the user’s platform.

The integrated equalization circuitry provides fl exibility with signal integrity of the PCI-express signal before the re-driver. Whereas the integrated de-emphasis circuitry provides
flexibility with signal integrity of the PCI-express signal after the ReDriver.

A low-level input signal detection and output squelch function is provided for both channels. Each channel operates fully independently. When a channel is enabled (EN_x=1) and operating, that channel's input signal level (on xl+/-) determines whether the output is enabled. If the input level of the channel falls below the active threshold level (Vth-) then the output driver switches off, and the pin is pulled to VDD via a high impedance resistor.

In addition to providing signal re-conditioning, Pericom’s PI2EQX4401D also provides power management Stand-by mode operated by a Bus Enable pin. A differential clock buffer is provided for test and other system requirements. This clock function is not used by the data channels.


  • One high-speed PCI-Express lane
  • Adjustable Transmiter De-Emphasis & Amplitude
  • Adjustable Receiver Equalization
  • One Spread Spectrum Reference Clock Buffer Output
  • Input Signal Level Detect and Output Squelch
  • 100Ω Differential CML I/O’s
  • Low Power (100mW per Channel)
  • Stand-by Mode – Power Down State
  • VDD Operating Range: 1.8V ±0.1V
  •  Packaging (Pb-free & Green): — 36-pad TQFN (ZF36)

Product Specifications

Product Parameters

Channels 2
Data Rate (Gbps) 5
Lanes/Ports 1
Output Swing Max (mV) 1600
Programming Interface(s) I2C, Pinstrap

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Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2505 2021-01-26 2021-07-26 Device End of Life (EOL)
PCN-2328 2018-04-12 2018-10-12 Device End of Life for tray packaging only


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