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DMT6002LPS

60V N-Channel Enhancement Mode MOSFET

Datasheet

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Description

This MOSFET is designed to minimize the on-state resistance (R_DS(ON)), yet maintain superior switching performance, making it ideal for high efficiency power management applications.

Feature(s)

100% Unclamped Inductive Switching – Ensures More Reliable and Robust End Application
Thermally Efficient Package – Cooler Running Applications
High Conversion Efficiency
Low R_DS(ON) – Minimizes On-State Losses
<1.1mm Package Profile – Ideal for Thin Applications

Application(s)

Switching
Synchronous Rectification
DC-DC Converters

Specifications & Technical Documents

Product Parameters

Compliance (Only Automotive Supports PPAP)	Standard
AEC Qualified	No
Polarity	N
ESD Diodes (Y\|N)	No
\|V_DS\| (V)	60 V
\|V_GS\| (±V)	20 ±V
\|I_DS\| @T_C = +25°C (A)	100 A
P_D @T_A = +25°C (W)	2.3 W
P_D @T_C = +25°C (W)	167 W
R_DS(ON)Max@ V_GS(10V) (mΩ)	2 mΩ
R_DS(ON)Max@ V_GS(4.5V) (mΩ)	3 (@6V) mΩ
\|V_GS(TH)\| Max (V)	3 V
Q_G Typ @ \|V_GS\| = 4.5V (nC)	63.6 nC
Q_G Typ @ \|V_GS\| = 10V (nC)	130.8 nC
C_ISS Typ (pF)	6555 pF
C_ISS Condition @\|V_DS\| (V)	30 V

Technical Documents

SPICE Model

DMT6002LPS.spice.txt

Recommended Soldering Techniques

TN1.pdf

Purchase & Availablity

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN #	Issue Date	Implementation Date	Subject
PCN-2628	2023-05-11	2023-08-11	Qualification of Additional Wafer Solderable Front Metal Plating, Back Grinding and Back Metal Process Source for Select Discrete Products