Diodes Incorporated
PowerDI3333 8

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DMP2010UFG

20V P-CHANNEL ENHANCEMENT MODE MOSFET

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Description

This new generation MOSFET is designed to minimize the onstate resistance (RDS(ON)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications.

Feature(s)

  • Low RDS(ON) Ensures On State Losses Are Minimized
  • Small Form Factor Thermally Efficient Package Enables Higher Density End Products
  • Occupies Just 33% of The Board Area Occupied by SO-8 Enabling Smaller End Product

Application(s)

  • Load Switch
  • Power Mamagement Function
  • Motherboards
  • Notebooks

Product Specifications

Product Parameters

AEC Qualified No
Compliance (Only Automotive(Q) supports PPAP) Standard
Polarity P
ESD Diodes (Y|N) No
|VDS| (V) 20 V
|VGS| (±V) 10 ±V
|IDS| @TA = +25°C (A) 12.7 A
PD @TA = +25°C (W) 2.3 W
RDS(ON)Max@ VGS(4.5V)(mΩ) 9.5 mΩ
RDS(ON)Max@ VGS(2.5V)(mΩ) 12.5 mΩ
|VGS(TH)| Min (V) 0.4 V
|VGS(TH)| Max (V) 1.2 V
QG Typ @ |VGS| = 4.5V (nC) 50 nC
QG Typ @ |VGS| = 10V (nC) 103 nC
CISS Typ (pF) 3350 pF
CISS Condition @|VDS| (V) 10 V

Related Content

Packages

Applications

Technical Documents

SPICE Model

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2601 2022-10-28 2023-01-28 Additional Wafer Source for Select Discrete Products
PCN-2495 2021-03-31 2021-07-01 Qualification of Additional Assembly & Test Sites and Additional Wafer Back Grinding and Back Metal Process
Source for Select Discrete Products
PCN-2456 2020-05-29 2020-08-29 Qualification of Internal "Diodes Technology (Cheng Du) Company Limited" (CAT) as an Additional Assembly & Test Site Using Copper or Palladium Coated Copper Bond Wire with Standardization of Assembly Bill of Materials, Or as an Additional Wafer Plating, Back Grinding and Back Metal Process Source, and Qualification of Additional Wafer Source for Select Discrete Products.

FAQs

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