Diodes Incorporated
PowerDI3333 8

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DMP2006UFG (Not Recommended for new design)

NRND = Not Recommended for New Design

20V P-CHANNEL ENHANCEMENT MODE MOSFET

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Description

This MOSFET has been designed to minimize the on-state resistance (RDS(ON)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications.

Application(s)

  • Load Switch
  • Power Management Functions

Product Specifications

Product Parameters

Compliance (Only Automotive supports PPAP) Standard
CISS Condition @|VDS| (V) 10
CISS Typ (pF) 5404
Compliance (Only Automotive(Q) supports PPAP) Standard
ESD Diodes (Y|N) No
|IDS| @TA = +25°C (A) 17.5
PD @TA = +25°C (W) 2.3
Polarity P
QG Typ @ |VGS| = 10V (nC) 140
QG Typ @ |VGS| = 4.5V (nC) 64
AEC Qualified Yes
RDS(ON)Max@ VGS(1.8V)(mΩ) 12
RDS(ON)Max@ VGS(2.5V)(mΩ) 7.5
RDS(ON)Max@ VGS(4.5V)(mΩ) 5.5
|VDS| (V) 20
|VGS| (±V) 10
|VGS(TH)| Max (V) 1
|VGS(TH)| Min (V) 0.4

Related Content

Packages

Technical Documents

SPICE Model

Recommended Soldering Techniques

TN1.pdf

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2533 2021-09-02 2022-03-02 Device End of Life (EOL)
PCN-2495 2021-03-31 2021-07-01 Qualification of Additional Assembly & Test Sites and Additional Wafer Back Grinding and Back Metal Process
Source for Select Discrete Products
PCN-2456 2020-05-29 2020-08-29 Qualification of Internal "Diodes Technology (Cheng Du) Company Limited" (CAT) as an Additional Assembly & Test Site Using Copper or Palladium Coated Copper Bond Wire with Standardization of Assembly Bill of Materials, Or as an Additional Wafer Plating, Back Grinding and Back Metal Process Source, and Qualification of Additional Wafer Source for Select Discrete Products.