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The 74LVC540A is an octal inverting buffer/driver is designed for driving bus lines or buffer memory address registers. The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.
These devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout. The device is designed for operation with a power supply range of 1.65V to 3.6V.
The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.
Supply Voltage Range from 1.65V to 3.6V
Sinks or Sources 24mA at VCC = 3V
CMOS Low Power Consumption
IOFF Supports Partial Power Down Operation
Inputs or Outputs Accept Up to 5.5V
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage Applications
Schmitt Trigger Action at All Inputs
Typical VOLP (Quiet Output Ground Bounce) Less Than 0.8V with VCC = 3.3V and TA = +25°C
Typical VOHV (Quiet Output dynamic VOH) Greater than 2.0V with VCC = 3.3V and TA = +25°C