Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details. X2-DFN0808-4

Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details. X2-DFN1010-6

Image shown is for reference only. Actual package may vary. Refer to the product data sheet for package details. X2-DFN1410-6

SOT353

X2-DFN1409-6

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74AUP1G09

Single 2 Input AND Gate

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Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The AUP1G09 is a single AND gate with an open drain output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output preventing damaging current backflow when the device is powered down.

Feature(s)

Advanced Ultra Low Power (AUP) CMOS

Supply Voltage Range from 0.8V to 3.6V

4mA Output Drive at 3.0V

Low Static power consumption

Application(s)

Suited for battery and low power needs

Wide array of products such as:

Specifications & Technical Documents

Product Parameters

Function	AND
Type	Logic Gates
Compliance (Only Automotive Supports PPAP)	Standard
Channels	1
Family	AUP
VCC Min (V)	0.8
VCC Max (V)	3.6
Input Type	Standard CMOS
Output Type	Open-Drain
Output Current (mA)	4

Technical Documents

Recommended Soldering Techniques

TN1.pdf