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The PI6ULS5V9511B is a hot-swappable I2 C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from connecting to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PI6ULS5V9511B provides bidirectional buffering, which keeps the backplane and card capacitances isolated. The PI6ULS5V9511B rise-time accelerator circuitry allows the use of weaker DC pullup currents while still meeting rise-time requirements. The PI6ULS5V9511B incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device into a low-current mode when asserted LOW. The PI6ULS5V9511B also incorporates an open-drain READY output pin, which indicates that the backplane and card sides are connected together (HIGH) or not (LOW). During insertion, the PI6ULS5V9511B SDA and SCL lines are pre-charged to 1.1V to minimize the current required to charge the parasitic capacitance of the chip.
Bidirectional Buffer for SDA and SCL Lines Increases Fan Out
Prevents SDA and SCL Corruption During Live Board Insertion and Removal from Backplane
Isolates Input SDA and SCL Lines From Output
Compatible with I2C, I2C Fast Mode, and SMBus Standards (up to 400kHz Operation)
Built-in Rise-Time Accelerators on all SDA and SCL
Wide Supply Voltage Range: 2.7V to 5.5V
Active HIGH ENABLE Input
Active HIGH READY Open-Drain Output
High-Impedance SDA and SCL pins for VCC = 0V
1.1V Pre-Charge on all SDA and SCL Lines
Supports Clock Stretching and Multiple Master Arbitration/Synchronization