NRND = Not Recommended for New Design
HiFlex® High Performance Ethernet & Fibre Channel Clock Generator
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| Supply Voltage (V) | 2.5, 3.3 |
|---|---|
| Jitter RMS (ps) | 0.25 |
| Skew (PS) | N/A |
| Output Frequency (MHz) | N/A |
| Input Type(s) | Crystal, CMOS, Differential |
| Output Type(s) | LVCMOS, LVPECL, LVDS |
| Number of Outputs | 6 |
| Supported Frequencies (MHz) | 156.25, 125, 106.25, 100, 33, 25 |
| Ambient or Junction Temperature (°C) | -40 to 85 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
| Orderable Part Number | Status | Package | Environmental Compliance | Packing | Buy from Distributor / Contact Sales |
Request Samples | |
|---|---|---|---|---|---|---|---|
| Qty. | Carrier | ||||||
| PI6LC4872-01ZDIEX | Not Recommended for New Design (NRND) | W-QFN6060-40 | TPGP | 3000 | T&R | Contact Sales | |
Environmental Compliance Legend:
LFF: Pb-Free Finish and RoHS 5/6
TLFP: Totally Pb-Free Product and RoHS 6/6
LFGP: Pb-free Finish and Green Product, RoHS 5/6 and Halogen Free
TPGP: Totally Pb-Free and Green Product, RoHS 6/6 and Halogen Free
GREEN: Halogen-free and RoHS compliant
RoHS: RoHS compliant but NOT halogen-free
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2567 | 2022-03-30 | 2022-09-30 | Device End of Life (EOL) |
PI6LCxxxx is Pericom's newly developed high frequency, very low jitter clock generator family, which use high Q silicon VCO to dramatically reduce traditional PLL clock jitter. They are especially good for Telecom, Datacom, and Ethernet for phase jitter <=1 ps designs. HiFlex Clock FInder tool
LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet to prevent double termination.
