NRND = Not Recommended for New Design
1.8V/2.5V, 250MHz, 1:4 Networking Clock Buffer
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The PI6C10804 is a 1.5V to 2.5V high-speed, low-noise 1:4 non-inverting clock buffer. The key goal in designing the PI6C10804 is to target networking applications that require lowskew, low-jitter, and high-frequency clock distribution. Providing output-to-output skew as low as 70ps, the PI6C10804 is an ideal clock distribution device for synchronous systems. Designing synchronous networking systems re quires a tight level of skew from a large number of outputs.
| Compliance(Only Automotive supports PPAP) | Standard |
|---|---|
| Function | Buffer |
| Number of Outputs | 4 |
| Output Type(s) | LVTTL, LVCMOS |
| Maximum Output Frequency (MHz) | 250 |
| Additive Jitter (ps) | N/A |
| Supply Voltage (V) | 1.8, 2.5 |
| Input Type(s) | LVTTL, LVCMOS |
| Skew (ps) | 70 |
| Ambient or Junction Temperature (°C) | -40 to 85 °C |
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.
| PCN # | Issue Date | Implementation Date | Subject |
|---|---|---|---|
| PCN-2602 | 2023-01-31 | 2023-07-31 | Device End of Life (EOL) |
