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*---------- DMT32M7LDG Spice Model ----------

*Q1
.SUBCKT DMT32M7LDG_Q1 10 20 30 
* TERMINALS : D G S
* MODEL FORMAT : SPICE3
* Editor : Stan Li
M1 1 2 3 3 NMOS L = 1E-006 W = 1E-006 
RD 10 1 0.001826 
RS 30 3 0.0001 
RG 20 2 0.6 
CGS 2 3 2.076E-009 
EGD 12 0 2 1 1 
VFB 14 0 0 
FFB 2 1 VFB 1 
CGD 13 14 8.58E-010 
R1 13 0 1 
D1 12 13 DLIM 
DDG 15 14 DCGD 
R2 12 15 1 
D2 15 0 DLIM 
DSD 3 10 DSUB 
.MODEL NMOS NMOS LEVEL = 3 VMAX = 1E+005 ETA = 0 VTO = 1.952 
+ TOX = 1E-007 NSUB = 1.046E+014 KP = 237.5 U0 = 750 KAPPA = 0.2 IS = 0 
.MODEL DCGD D CJO = 4.853E-010 VJ = 1.918 M = 0.8709 
.MODEL DSUB D IS = 4.002E-009 N = 1.328 RS = 0.0007004 BV = 35 
+ CJO = 2.53E-009 VJ = 2 M = 0.2803 XTI = 0 TT = 1.667E-008 
.MODEL DLIM D IS = 0.0001 
.ENDS

*Q2
.SUBCKT DMT32M7LDG_Q2 10 20 30 
* TERMINALS : D G S
* MODEL FORMAT : SPICE3
* Editor : Stan Li
M1 1 2 3 3 NMOS L = 1E-006 W = 1E-006 
RD 10 1 0.001647 
RS 30 3 0.0001 
RG 20 2 0.54 
CGS 2 3 2.04E-009 
EGD 12 0 2 1 1 
VFB 14 0 0 
FFB 2 1 VFB 1 
CGD 13 14 9.22E-010 
R1 13 0 1 
D1 12 13 DLIM 
DDG 15 14 DCGD 
R2 12 15 1 
D2 15 0 DLIM 
DSD 3 10 DSUB 
.MODEL NMOS NMOS LEVEL = 3 VMAX = 1E+005 ETA = 0 VTO = 1.958 
+ TOX = 1E-007 NSUB = 1E+014 KP = 262.2 U0 = 750 KAPPA = 0.2 IS = 0 
.MODEL DCGD D CJO = 4.212E-010 VJ = 2 M = 0.8464 
.MODEL DSUB D IS = 3.39E-009 N = 1.315 RS = 0.0003841 BV = 35.71 
+ CJO = 2.538E-009 VJ = 2 M = 0.2852 XTI = 0 TT = 1.671E-008 
.MODEL DLIM D IS = 0.0001 
.ENDS
*Diodes Spice Model v1.2 Last Revised 2024/11/21
*The model is an approximation of the device, and it may not show the true device performance under all conditions.
*The model only guarantees the accuracy of the key parameters (Ron, VSD, IDSS, Ciss, Coss, Crss, and Trr) at 25 degC in the current data sheet.