* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES") 
* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY 
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY 
* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF 
* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED, 
* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM 
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT, 
* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH 
* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY 
* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER 
* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, 
* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM 
* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.



*DATE=22FEB2024
*VERSION=1.0

* block symbol definitions
.subckt dgd0227 NC INA COM INB OUTB VCC OUTA NC1
C1 dlyoutl COM 20p
S1 drvlp illp dlyoutl COM SRSTP
S2 illn drvln dlyoutl COM SRSTN
R1 drvlp OUTA 1.4 tol=1.1
R2 drvln OUTA 1.2 tol=1
C2 OUTA COM 5.9n
D1 COM OUTA DMOD
D2 OUTA VCC DMOD
E1 bias6 COM OUTA drvln 1
R3 bias6 dlyln 10k
C3 dlyln COM 10p
E2 bias7 COM drvlp OUTA 1
R4 bias7 dlylp 10k
C4 dlylp COM 10p
S3 illp VCC dlylp COM SILIMP
S4 COM illn dlyln COM SILIMN
S5 COM linst INA COM SDIN
R5 INA COM 950k
D3 COM INA DMOD
D4 INA VCC DMOD
E3 bias1 COM VCC COM 1
R6 bias1 ldelayu {RUdelay}
C5 ldelayu COM {CUdelay}
XX1 linst ldelay VCC ideal_inverter
D5 COM VCC DMOD
R7 VCC COM 550k
S6 COM ldelayu ldelay COM SLIN
R8 bias1 linst {RDdelay}
C6 linst COM {CDdelay}
C7 N003 COM 10p
S7 COM N003 VCC COM SUVCC
R9 N003 bias1 1k
XX2 ldelayu N001 VCC ideal_inverter
C8 dlyoutlb COM 20p
S8 drvlpb illpb dlyoutlb COM SRSTP
S9 illnb drvlnb dlyoutlb COM SRSTN
R10 drvlpb OUTB 1.4 tol=1.1
R11 drvlnb OUTB 1.2 tol=1
C9 OUTB COM 5.9n
D6 COM OUTB DMOD
D7 OUTB VCC DMOD
E4 bias9 COM OUTB drvlnb 1
R12 bias9 dlylnb 10k
C10 dlylnb COM 10p
E5 bias8 COM drvlpb OUTB 1
R13 bias8 dlylpb 10k
C11 dlylpb COM 10p
S10 illpb VCC dlylpb COM SILIMP
S11 COM illnb dlylnb COM SILIMN
S12 COM linstb INB COM SDIN
R14 INB COM 950k
D8 COM INB DMOD
D9 INB VCC DMOD
E6 bias2 COM VCC COM 1
R15 bias2 ldelayub {RUdelay}
C12 ldelayub COM {CUdelay}
XX4 linstb ldelayb VCC ideal_inverter
S13 COM ldelayub ldelayb COM SLIN
R16 bias2 linstb {RDdelay}
C13 linstb COM {CDdelay}
C14 N006 COM 10p
S14 COM N006 VCC COM SUVCC
R17 N006 bias2 1k
XX5 ldelayub N004 VCC ideal_inverter
XX3 N001 N002 dlyoutl VCC ideal_nor_2
XX7 N003 N002 VCC ideal_inverter
XX6 N004 N005 dlyoutlb VCC ideal_nor_2
XX8 N006 N005 VCC ideal_inverter
.MODEL DMOD D(IS=1.0e-14 RS=0.01 N=1 EG=1.11 XTI=3 BV=25 IBV=10u CJO=0 VJ=0.75 M=0.333 FC=0.5 TT=0 KF=0 AF=1)
.MODEL SRSTN SW(Ron=10Meg Roff=1m Vt=1.5 Vh=1.2)
.MODEL SRSTP SW(Ron=1m Roff=10Meg Vt=1.5 Vh=1.2)
.MODEL SLIN SW(Ron=10Meg Roff=1m Vt=1.5 Vh=0.15)
.MODEL SILIMN SW(Ron=2.3 Roff=1m Vt=4.8 Vh=0.01)
.MODEL SILIMP SW(Ron=2.1 Roff=1m Vt=5.6 Vh=0.01)
.MODEL SDIN SW(Ron=1m Roff=100Meg Vt=1.5 Vh=0.15)
.param CUdelay=10p RUdelay=5.7k CDdelay=10p RDdelay=4.9k
.MODEL SUVCC SW(Ron=10Meg Roff=1m Vt=3.25 Vh=0.05)
.ends dgd0227

.subckt ideal_inverter A Y Vdd
S3 Y Vdd N001 A switmod
S4 0 Y A N001 switmod
E1 N001 0 Vdd 0 0.5
C1 Y 0 10p
.model switmod SW(Ron=1m Roff=10Meg Vt=0 Vh=0.00001)
.ends ideal_inverter

.subckt ideal_nor_2 A B Y Vdd
S1 Y N001 Vtrip A switmod
S2 0 Y A Vtrip switmod
E1 Vtrip 0 Vdd 0 0.5
S3 N001 Vdd Vtrip B switmod
S5 0 Y B Vtrip switmod
C1 Y 0 10p
.model switmod SW(Ron=1m Roff=10Meg Vt=0 Vh=0.00001)
.ends ideal_nor_2

******************************************************************************
*                	 (c)  2024 Diodes Inc
*
*   Diodes Incorporated and its affiliated companies and subsidiaries 
*   (collectively, "Diodes") provide these spice models and data 
*   (collectively, the "SM data") "as is" and without any representations
*   or warranties, express or implied, including any warranty of
*   merchantability or fitness for a particular purpose, any warranty 
*   arising from course of dealing or course of performance, or any 
*   warranty that access to or operation of the SM data will be
*   uninterrupted, or that the SM data or any simulation using the SM data
*   will be error free.
*
*   To the maximum extent permitted by law, in no event will Diodes be
*   liable for any indirect, special, incidental, punitive or consequential
*   damages arising out of or in connection with the production or use of
*   SM data, however caused and under whatever cause of action or theory of
*   liability brought (including, without limitation, under any contract,
*   negligence or other tort theory of liability), even if Diodes has been
*   advised of the possibility of such damages, and Diodes' total liability
*   (whether in contract, tort or otherwise) with regard to the SM data
*   will not, in the aggregate, exceed any sums paid by you to Diodes for
*   the SM data
*
*   Diodes Zetex Semiconductors Ltd, Zetex Technology Park, Chadderton,
*   Oldham, United Kingdom, OL9 9LL
******************************************************************************