* DIODES INCORPORATED AND ITS AFFILIATED COMPANIES AND SUBSIDIARIES (COLLECTIVELY, "DIODES") 
* PROVIDE THESE SPICE MODELS AND DATA (COLLECTIVELY, THE "SM DATA") "AS IS" AND WITHOUT ANY 
* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY WARRANTY OF MERCHANTABILITY 
* OR FITNESS FOR A PARTICULAR PURPOSE, ANY WARRANTY ARISING FROM COURSE OF DEALING OR COURSE OF 
* PERFORMANCE, OR ANY WARRANTY THAT ACCESS TO OR OPERATION OF THE SM DATA WILL BE UNINTERRUPTED, 
* OR THAT THE SM DATA OR ANY SIMULATION USING THE SM DATA WILL BE ERROR FREE. TO THE MAXIMUM 
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL DIODES BE LIABLE FOR ANY DIRECT OR INDIRECT, 
* SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION WITH 
* THE PRODUCTION OR USE OF SM DATA, HOWEVER CAUSED AND UNDER WHATEVER CAUSE OF ACTION OR THEORY 
* OF LIABILITY BROUGHT (INCLUDING, WITHOUT LIMITATION, UNDER ANY CONTRACT, NEGLIGENCE OR OTHER 
* TORT THEORY OF LIABILITY), EVEN IF DIODES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, 
* AND DIODES' TOTAL LIABILITY (WHETHER IN CONTRACT, TORT OR OTHERWISE) WITH REGARD TO THE SM 
* DATA WILL NOT, IN THE AGGREGATE, EXCEED ANY SUMS PAID BY YOU TO DIODES FOR THE SM DATA.



*TITLE=ZXRE160 MACROMODEL
*ORIGIN=DZSL_AG_GS
*Derived from the ZXRE060
*SIMULATOR=DIODES, SIMETRIX and PSPICE
*DATE=3rd March 2011
*VERSION=1
*PIN_ORDER   1:PGND, 2:GND, 3:IN, 4:FB, 5:OUT
*
.subckt ZXRE160 PGND  GND  IN  FB  OUT
* pins-----------1----2----3----4---5      
*
*Voltage reference with temperature effect
E1      REFG  1    value={(0.6+1.72e-5*(TEMP-25)-1e-7*(TEMP-25)**2)*(0.5+0.5*tanh(4*(V(VCCL)-1.5)))}
I1      VCCL  1    0.48m  ; Supply current    
R1      REFG  inm  48k
R2      FB    inp  48k
C1      inm   inp  0.2p  
I3      VCCL  inp  45n ; input bias current
I4      VCCL  inm  45n
*
*First amplifier, limited to internal 2V supply
E2      E2out 1    value={tanh(11.52*(V(inp)-V(inm)))}
R7      E2out C3p  1
C3      C3p   1    250n ;  600kHz first breakpoint
R3      C3p   int  10k
I2      VCCL  int  2.5u
C2      int   1    6p   ;  2MHz second breakpoint
*Second amplifier: transconductance
*with sink current output voltage limit of 0
*source current output voltage limit of 2V
G1      G1out 1    value={11e-6*(1-tanh(19.3*(v(int)-v(Q2e))))*tanh(10*max((V(G1out)-V(1)),0))}
G2      VCCL G1out value={11e-6*(1+tanh(19.3*(V(int)-V(Q2e))))*tanh(10*max(2-(V(G1out)-V(1)),0))}
*
*Output Stage
Q1      Q1c  G1out Q2b 1 NPNCT
R4      VCCL Q1c   250
R5      Q2b  PGNDL 50k
Q2      OUTL Q2b   Q2e 1 NPNCT 5
R6      Q2e  PGNDL 2.56
*
L1      IN   VCCL  2n
L2      GND  1     2n
L3      OUT  OUTL  2n
L4      PGND PGNDL 2n
*Output transistor model from CT
.model  NPNCT NPN  
+ is = 2.265f
+ nf = 1.000 
+ ise = 6.055f
+ ne = 1.562 
+ bf = 190.0 
+ ikf = 28.71m
+ vaf = 22.83 
+ nr = 1.008 
+ isc = 1.00000e-24
+ nc = 1.543 
+ br = 34.83 
+ ikr = 1.250m
+ var = 19.13 
+ rb = 267.9 
+ irb = 1.250m
+ rbm = 100.0m
+ re = 802.9m
+ rc = 164.1m
+ cje = 163.1f
+ vje = 1.200 
+ mje = 151.0m
+ tf = 70.00p
+ xtf = 10.00 
+ vtf = 30.00 
+ itf = 200.0m
+ ptf = 34.00 
+ cjc = 380.6f
+ vjc = 410.0m
+ mjc = 360.0m
+ xcjc = 50.00m
+ tr = 6.00n
+ cjs = 525.2f
+ vjs = 401.0m
+ mjs = 179.2m
+ xtb = 200.0m
+ xti = 5.100 
+ eg = 1.110 
+ fc = 950.0m
.ends ZXRE160