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PI6CB18601

Very Low Power 6-Output PCIe Clock Buffer with on chip termination

Description

The PI6CB18601 is an 6-output very low power PCIe Gen1/ Gen2/Gen3 clock buffer. It takes an reference input to fanout six 100MHz low power differential HCSL outputs with on-chip
terminations. The on-chip termination can save 24 external resistors and make layout easier. Individual OE pin for each output provides easier power management.
It uses Diodes proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3 requirements. Other than PCIe 100MHz support, this device also support Ethernet application
with 50MHz or 125MHz via SMBus. It provides various options such as different slew rate and amplitude through strapping pins or SMBUS so that users can configure the device easily
to get the optimized performance for their individual boards.

Features

  • 1.8V supply voltage
  • HCSL input: 100MHz, also suppport 50MHz or 125MHz via SMBus
  • 6 differential low power HCSL outputs with on-chip termination
  • Individual output enable
  • Programmable Slew rate and output amplitute for each output
  • Differential outputs blocked until PLL is locked
  • Strapping pins or SMBus for configuration;
  • 3.3V tolerant SMBus interface support
  • Very low jitter outputs
  •  Differential cycle-to-cycle jitter <50ps
  • Differential output-to-output skew <50ps
  • PCIe Gen1/Gen2/Gen3 compliant
  • Packaging (Pb-free & Green): 40-lead 5×5mm TQFN

Product Specifications

Product Parameters

Additive Jitter (ps) 0.1
Function Zero-Delay Buffer
Input Type(s) HCSL
Maximum Output Frequency (MHz) 100
Number of Outputs 6
Output Type(s) LP-HCSL
Skew (ps) 50
Supply Voltage (V) 1.8
Temperature -40 to 85

Quality & Reliability

Technical Documents

Design tool model software

Recommended Soldering Techniques
Orderable Part Number Authorized Distributor Quantity Inventory Date Buy Online Region
PI6CB18601ZLAIEX Digi-Key Electronics 3500 11/12/2018 Buy Now Americas