The PI6CG18201 is a 2-output very low power PCIe Gen1/Gen2/Gen3/Gen4 clock generator. It uses 25MHz crystal or CMOS reference as an input to generate the 100MHz low power differential HCSL
outputs with on-chip terminations. The on-chip termination can save 8 external resistors and make layout easier. An additional buffered reference output is provided to serve as a low noise reference
for other circuitry.
It uses Diodes Incorporated proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. It also provides various options such as different slew rate and amplitude through
strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual boards. The device also supports selectable spread-spectrum options
to reduce EMI for various applications.
1.8V supply voltage
Crystal/CMOS input: 25 MHz
2 differential low power HCSL outputs with on-chip termination
Individual output enable
Reference CMOS output
Programmable Slew rate and output amplitude for each output
Differential outputs blocked until PLL is locked
Selectable 0%, -0.25% or -0.5% spread on differential outputs