Diodes Menu Close
Back to HiFlex® Clock Generators

PI6LC4830

PCIe & Ethernet Clock Generator

Contact Sales

Log in or register to manage email notifications about changes to datasheets or PCNs for this part.

Product Description

The PI6LC4830 is an LC VCO based low phase noise design intended for the most demanding PCIe® 2.0 applications. Use of the ultra-low noise LC VCO allows for much greater noise margins than traditional solutions. This is ideal for noisy environments. 

Features

  • 3.3V supply voltage
  • 3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function Î 1 LVCMOS 100/50MHz selectable
  • 25MHz crystal or differential input
  • Low 1ps RMS max integrated phase noise design
  • PLL Bypass mode for test
  • 32 lead 5x5mm TQFN package 

Product Specifications

Product Parameters

Supply Voltage (V) 3.3
Jitter RMS (ps) 0.4
Skew (PS) 0
Output Frequency (MHz) 3x 100 MHz, 1x 100 MHz, 1x 50/100 MHz, 1x 25 MHz
Input Type(s) Crystal, Differential
Output Type(s) HCSL, LVCMOS, Differential
Number of Outputs 6
Supported Frequencies (MHz) 100, 50, 25
Ambient or Junction Temperature (°C) -40 to 85

Technical Documents

Recommended Soldering Techniques

TN1.pdf

Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents

Request Documents
Orderable Part Number Status Package Environmental Compliance Packing Buy from Distributor /
Contact Sales
Request Samples
Qty. Carrier
PI6LC4830ZHEX Active W-QFN5050-32 TPGP 2500 T&R Contact Sales Request Sample

Environmental Compliance Legend:
LFF: Pb-Free Finish and RoHS 5/6
TLFP: Totally Pb-Free Product and RoHS 6/6
LFGP: Pb-free Finish and Green Product, RoHS 5/6 and Halogen Free
TPGP: Totally Pb-Free and Green Product, RoHS 6/6 and Halogen Free
GREEN: Halogen-free and RoHS compliant
RoHS: RoHS compliant but NOT halogen-free

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2520 2021-05-27 2021-08-27 Qualified Additional Bump Site and Assembly/Test (A/T) Sites
PCN-2328 2018-04-12 2018-10-12 Device End of Life for tray packaging only

FAQs

Related Protocol FAQs

PI6LC4830 FAQs

What is HiFlex® clock IC?

PI6LCxxxx is Pericom's newly developed high frequency, very low jitter clock generator family, which use high Q silicon VCO to dramatically reduce traditional PLL clock jitter. They are especially good for Telecom, Datacom, and Ethernet for phase jitter <=1 ps designs.  HiFlex Clock FInder tool

What is LVPECL clock and its termination?

LVPECL is Low Voltage Positive (supply) Emitter Couple Logic. Its voltage level is around 2V+/-400mV and the most use termination is 150 ohm pull-down at output pin and AC or DC coupling to an equivalent 100 ohm across pair at RX ASIC side. Check ASIC datasheet  to prevent double termination.