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The PI6CB18401 is a 4-output very low power PCIe Gen1/Gen2/Gen3/Gen4 clock buffer. It takes an reference input to fanout four 100MHz low power differential HCSL outputs with on-chip terminations. The on-chip termination can save 16 external resistors and make layout easier. Individual OE pin for each output provides easier power management.
It uses Diodes' proprietary PLL design to achieve very low jitter that meets PCIe Gen1/Gen2/Gen3/Gen4 requirements. Other than PCIe 100MHz support, this device also support Ethernet application with 50MHz or 125MHz via SMBus. It provides various options such as different slew rate and amplitude through strapping pins or SMBUS so that users can configure the device easily to get the optimized performance for their individual boards.
1.8V supply voltage
HCSL input: 100MHz, also suppport 50MHz or 125MHz via SMBus
4 differential low power HCSL outputs with on-chip termination
Individual output enable
Programmable Slew rate and output amplitute for each output
Environmental Compliance Legend: LFF: Pb-Free Finish and RoHS 5/6 TLFP: Totally Pb-Free Product and RoHS 6/6 LFGP: Pb-free Finish and Green Product, RoHS 5/6 and Halogen Free TPGP: Totally Pb-Free and Green Product, RoHS 6/6 and Halogen Free GREEN: Halogen-free and RoHS compliant RoHS: RoHS compliant but NOT halogen-free
Product Change Notices (PCNs)
A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.