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3GHz 1:4 LVPECL Fanout Buffer

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The PI6C5913004 is a high-performance low-skew 1-to-4 LVPECL fanout buffer. The pin selectable inputs accept LVPECL, LVDS, CML and SSTL signals. PI6C5913004 is ideal for clock distribution applications such as providing fanout for low noise oscillators.


  • Clock Frequency up to 3 GHz
  • 4 pairs of differential LVPECL outputs
  • Low additive jitter, < 0.02ps (max)
  • Inputs accept: LVPECL, LVDS, CML, LVCMOS input level
  • Pin Selectable inputs
  • Output to Output skew: <20ps
  • Operating Temperature: -40° C to 85° C
  • Power supply: 3.3V ±10% or 2.5V ±5%
  • Packaging (Pb-free & Green)
  • 16-pin TQFN available

Product Specifications

Product Parameters

Function Buffer
Number of Outputs 4
Output Type(s) LVPECL
Maximum Output Frequency (MHz) 3000
Additive Jitter (ps) 0.02
Supply Voltage (V) 2.5, 3.3
Input Type(s) LVCMOS, Differential
Skew (ps) 20
Ambient or Junction Temperature (°C) -40 to 85

Technical Documents

Recommended Soldering Techniques


Orderable Part Number Status Package Environmental Compliance Packing Buy from Distributor /
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Qty. Carrier
PI6C5913004ZHIEX Active W-QFN3030-16 TPGP 3500 T&R


Authorized Distributor Quantity Inventory Date Countries/Regions Buy Online
Digi-Key Electronics 669 12/3/2022 Europe, Asia, North America Buy Now
Mouser Electronics Inc. 1894 12/3/2022 South America, North America, Asia, Europe, Middle East Buy Now
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Environmental Compliance Legend:
LFF: Pb-Free Finish and RoHS 5/6
TLFP: Totally Pb-Free Product and RoHS 6/6
LFGP: Pb-free Finish and Green Product, RoHS 5/6 and Halogen Free
TPGP: Totally Pb-Free and Green Product, RoHS 6/6 and Halogen Free
GREEN: Halogen-free and RoHS compliant
RoHS: RoHS compliant but NOT halogen-free

Product Change Notices (PCNs)

A PCN may only apply to specific orderable part numbers in this datasheet. Please refer to the corresponding PCN to see the exact orderable part number(s) affected.

PCN # Issue Date Implementation Date Subject
PCN-2585 2022-06-08 2022-09-08 Qualified Additional Assembly/Test (A/T) Sites, Wafer Fab IMD Backend, and Package Outline Dimension Change