PCIe 2.0 Networking Clock Generator
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The PI6C49003A is a clock generator device intended for PCIe® Gen2 networking applications. The device includes five 100MHz differential Host Clock Signal Level (HCSL) outputs for PCIe Gen 2, two single-ended 50MHz outputs, one single-ended 32.256MHz output, and one selectable single-ended 33/66/133MHz output.
Using a serially programmable SMBUS interface, the PI6C49003A incorporates spread spectrum modulation on the twelve 100MHz HCSL PCIe Gen 2 outputs, and independent frequency margining on the 50MHz output, 33.3333MHz and 66.6666MHz clock outputs.
3.3V+/-10% Supply Voltage
Uses 25MHz xtal
Five PCIe® Gen. 2 100MHz HCSL outputs with optional -0.5% spread spectrum support
Two LVCMOS 50MHz outputs that support +/-10% frequency margining
One frequency selectable 33/66/133MHz LVCMOS output
One 32.256MHz LVCMOS output
Industrial temperature -40°C to 85°C
Package: 48-pin TSSOP package
| Compliance (Only Automotive(Q) supports PPAP) | Standard |
|---|---|
| Supply Voltage (V) | 3.3 |
| Additive Jitter (ps) | <3 |
| Skew (PS) | 200 |
| Maximum Output Frequency (MHz) | 100 |
| Input Type(s) | Crystal |
| Output Type(s) | HCSL, CMOS |
| Number of Outputs | 9 |
| Function | Generator |
| Ambient or Junction Temperature (°C) | -40 to 85 |
Additional Technical Documents are available upon request:
Application information, Evaluation board, and Other technical documents
